Episode 6.08 – Binary Decoders

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Welcome to the Geek Author series on Computer Organization and Design Fundamentals. I’m David Tarnoff, and in this series, we are working our way through the topics of Computer Organization, Computer Architecture, Digital Design, and Embedded System Design. If you’re interested in the inner workings of a computer, then you’re in the right place. The only background you’ll need for this series is an understanding of integer math, and if possible, a little experience with a programming language such as Java. And one more thing. Due to the computational nature of this episode, you might want to visit the transcript page found at intermation.com to download the episode worksheet.

Now that we have a little experience with designing digital circuitry, let’s take a look at some more applications. It turns out that many times we simply need to know when to turn on a device. This could range from opening up a communication channel or mato activating a memory location to store a variable. In general, we need to create a circuit that identifies when a unique set of conditions is true. For example, the magnetron in a microwave oven is enabled only when the timer is running and the start button is pushed and the oven door is closed. Notice the sentence we used to describe the magnetron operation uses the conjunction “and”. Therefore, the enabling circuit for the magnetron should be realized with the AND gate.

It’s common to enable a digital system using a specific pattern of ones and zeros from multiple sources. For example, an automobile with an automatic transmission allows the shifter to move from park to drive only if the vehicle is on and the driver’s foot is pressing the brake. A vending machine delivers a soda only if enough money is inserted and a selection button is pushed and the machine is not out of the selected soda. In computing, we use a similar method to connect a processor to a simple memory bus. A memory bus provides the processor with connections to multiple memory devices, but only one of them can communicate with the processor at any one time. A circuit made from the AND gate is used to enable exactly one memory device at a time.

Remember that the AND gate outputs a one only when all of its inputs equal one. If one or more inputs pass through an inverter before entering the AND gate input, the output of the AND gate is one if and only if all of the inputs without inverters equal one and all of the inputs with inverters equal zero. The conditions that activate that AND gate are governed by the pattern of inverters at its inputs.

The truth table for this type of circuit will have exactly one row with an output of one while all of the other rows output a zero. We can move the single row with the one to any other position by changing which inputs we invert. For example, A AND B AND C has a one in the bottom row of the three input truth table. A-bar AND B AND C has a one in the fourth row where A equals zero while B and C equal one. The truth table for A-bar AND B-bar AND C-bar has a one only in the top row.

Binary decoders are a group of these “enable” circuits that have an individual output used to identify each combination of ones and zeros possible at its inputs. For example, a 2-input binary decoder circuit with inputs A and B will have four outputs that we are going to label Q0, Q1, Q2, and Q3. For any combination of ones and zeros at the inputs A and B, exactly one output will be active. Q0 will equal one only when A equals zero and B equals zero, Q1 will equal one only when A equals zero and B equals one, Q2 will equal one only when A equals one and B equals zero, and Q3 will equal one only when A equals one and B equals one. The Boolean expressions behind these four independent circuits are: Q0 equals A-bar AND B-bar, Q1 equals A-bar AND B, Q2 equals A AND B-bar, and Q3 equals A AND B.

This two-input circuit can be found under a couple of different names. It could be called a 1-of-4 decoder due to the fact that exactly one of its four outputs will be enabled at any one time. A change at any of the inputs will change which output is enabled, but never change the fact that only one is enabled. Sometimes you might see this circuit called a 2-to-4 decoder since it decodes two inputs into one of four outputs.

In Episode 4.04 – NAND, NOR, and Exclusive-NOR Logic, we discussed how it is common to implement these enable signals as active-low due to the nature of electronics. To implement this with our binary decoder, we must invert the output of each AND gate. This means that the active-low binary decoder circuit is implemented using NAND gates. We can easily identify a diagram of one of these circuits since each of the Q outputs will have an overbar identifying it as active low. An active low 1-of-n decoder will have exactly one of its outputs equal to zero while the other outputs will be one.

Decoder circuits can have any number of inputs. The number of outputs, however, is limited by the number of inputs. If, for example, a decoder has four inputs signals, A, B, C, and D, then there are 24 or 16 unique combinations of ones and zeros possible at the inputs. Each of these combinations requires a NAND gate to generate an output for that particular input pattern. A truth table for one of these 1-of-16 decoders will have sixteen columns to represent the sixteen Q outputs. Going from row-to-row down the truth table through the possible input patterns, the active signal will travel diagonally through the output columns so that Q0 is the only active output in the row 0-0-0-0, Q1 is the only active output in the row 0-0-0-1, Q2 is the only active output in the row 0-0-1-0, all the way to the bottom row where Q15 is the only active output in the row 1-1-1-1.

Note that the upper limit for the number of outputs of an n-input binary decoder is 2n, but that is an upper limit. Not all binary decoders have the full number of outputs. For example, a BCD-to-decimal decoder has four input bits, but only has ten output bits. The ten output bits are used to identify which single digit decimal integer is present at its inputs. If a non-decimal digit, in other words, A through F, is present at the inputs, all of the outputs are inactive.

In our next episode, we are going to look at another common digital circuit, the multiplexer. For episode transcripts, worksheets, links, or other podcast notes, please visit us at intermation.com where you will also find links to our Instagram, Twitter, Facebook, and Pinterest pages. Until the next episode, remember that while the scope of what makes a computer is immense, it’s all just ones and zeros.